PCB Crosstalk Calculator

Your details

Microstrip traces run on the outer PCB surface above a single ground plane. Stripline traces are embedded between two ground planes and have lower FEXT due to field symmetry.
Width of the aggressor and victim traces. Both traces are assumed to have the same width for this calculation.
mm
The edge-to-edge gap between the aggressor and victim traces, not center-to-center. Increasing spacing is the most effective way to reduce crosstalk.
mm
For microstrip: height of the dielectric from the trace bottom to the reference ground plane. For stripline: half the total height between the two ground planes (symmetrical stripline assumed).
mm
Length of the region where the aggressor and victim traces run in parallel. Longer parallel runs increase NEXT (up to saturation) and FEXT increases linearly.
mm
Relative permittivity of the PCB substrate material. FR-4 is typically 4.0-4.5. Rogers 4003C is 3.55, Rogers 4350B is 3.66, polyimide is about 3.5.
Peak voltage of the signal on the aggressor trace. This sets the scale for the coupled voltage outputs.
V
The 10-90% rise time of the aggressor signal. Faster rise times increase FEXT and set the saturation length threshold.
ns
NEXTExcellent isolation
0.94%

Near-End Crosstalk as a percentage of aggressor voltage

NEXT (dB)-40.5dB
FEXT0.03%
FEXT (dB)-71.2dB
NEXT voltage31.1mV
FEXT voltage0.9mV
Saturation length146.8mm
3W min spacing0.45mm
S/H ratio1
0.94 %
Excellent<3Acceptable3-6Marginal6-15High crosstalk15+

NEXT is 0.94% (-40.5 dB). Your design has excellent isolation.

  • The coupled length (50 mm) is below the saturation length (146.8 mm), so NEXT would increase if the parallel run were extended.
  • Microstrip traces have asymmetric fields so FEXT does not cancel. Your FEXT is 0.03%, which adds noise at the receive end of the victim trace.
  • Your S/H ratio is 1.00, which is below 2. Increasing the spacing or reducing the dielectric height would meaningfully lower NEXT.

Next stepYour crosstalk looks acceptable. Double-check against your simulation tool and verify with a TDR measurement on the fabricated board.

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