MOSFET Threshold Voltage Calculator

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N-channel uses a p-type substrate; p-channel uses an n-type substrate.
Gate oxide thickness in nanometres. Typical values: 2-10 nm (modern CMOS), 10-100 nm (power devices).
nm
Acceptor concentration for NMOS (p-substrate), or donor concentration for PMOS (n-substrate).
cm^-3
Flatband voltage accounts for work-function difference between gate and substrate plus oxide trapped charges. Typically -0.5 to -1.0 V for n-poly gate on p-Si.
V
Reverse bias between source and body (bulk). Set to 0 for the basic threshold (VT0). A positive value for NMOS raises Vth (body effect).
V
Operating temperature in Kelvin. 300 K = 27 C (room temperature). Higher temperature reduces Vth at about 1.5-2.5 mV/K.
K
Threshold voltage (Vth)Low-threshold (high speed)
0.3906V

Minimum gate-source voltage to form the inversion channel

Zero-bias threshold (VT0)0.3906V
Fermi potential (phiF)0.4072V
Oxide capacitance (Cox)3.4531fF/um^2
Body-effect coefficient (gamma)0.5276V^0.5
Body-effect shift (dVth)0V
Depletion charge (|Qdep|)164.4154nC/cm^2
0.3906 V
Depletion mode<0Ultra-low Vth0-0.4Low Vth0.4-0.8Standard Vth0.8-1.5High Vth1.5+

Threshold voltage is 0.3906 V (NMOS).

  • This NMOS device turns on when VGS exceeds 0.391 V (enhancement mode, the most common type).
  • Body-effect coefficient gamma = 0.528 V^0.5. At VSB = 0 V there is no body-effect shift.
  • Strong inversion occurs at a surface potential of 2 x phiF = 0.814 V.

Next stepTo reduce Vth without changing oxide thickness, lower the substrate doping or apply a negative flatband voltage (e.g. by using a p+ poly gate). To raise Vth and cut leakage, increase doping or use a body bias.

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