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Physics

Transistor Biasing Calculator

Select a biasing topology, enter your circuit values, and instantly get the DC operating point (Q-point), voltage gain, input and output impedance, and thermal stability factor. Covers voltage divider bias, fixed base bias, collector feedback bias, and emitter feedback bias for NPN silicon BJTs. The show-your-work panel traces every formula step so you can verify your design by hand.

Your details

Voltage divider is the most stable and widely used; fixed bias is the simplest but sensitive to beta variations.
DC power supply voltage connected to the collector side.
V
DC current gain hFE of the transistor. Check the datasheet; typical silicon BJTs: 50-300.
Junction forward voltage. 0.7 V for silicon (default); 0.3 V for germanium.
V
Top resistor of the voltage-divider network that sets base voltage.
Bottom resistor of the voltage-divider network, connected to ground.
Load resistor at the collector terminal.
Emitter degeneration resistor. Set to 0 for no emitter resistor (fixed/CFB topologies often omit it).
External AC load resistor. Used to compute effective AC collector resistance Rc'||RL for voltage gain.
Collector current (Ic)Active region
2.971mA

DC quiescent collector current - the main Q-point current

Base voltage (Vb)2.11V
Emitter voltage (Ve)1.41V
Collector voltage (Vc)5.464V
Base current (Ib)29.71μA
Emitter current (Ie)3.001mA
Collector-emitter voltage (Vce)4.053V
Operating regionActive (linear region)
Voltage gain (Av)3.77
Input impedance (Zin)1.74
Output impedance (Zout)2.2
Stability factor (S)4.66
4.053 V
Saturation<0.2Active region0.2-12.5Near cutoff12.5+
02.735.450612
Vce (V)
Ic (mA)
Vce (V)DC Load Line
120
11.40.27
10.80.55
10.20.82
9.61.09
91.36
8.41.64
7.81.91
7.22.18
6.62.45
62.73
5.43
4.83.27
4.23.55
3.63.82
34.09
2.44.36
1.84.64
1.24.91
0.65.18
05.45

Voltage divider bias: Ic = 2.97 mA, Vce = 4.05 V (Active)

  • Voltage gain is 3.8x. Adding a bypass capacitor across Re will increase gain toward Rc / re.
  • Stability factor S = 4.7: excellent thermal stability.

Next stepTo set the Q-point for maximum swing, aim for Vce near Vcc/2 and Ic in the linear region. Use a bypass capacitor across Re to maximize AC gain without sacrificing DC stability.

What is transistor biasing and why does it matter?

A BJT transistor amplifies signals only when it operates in its active (linear) region. Biasing sets the DC operating point, called the Q-point (quiescent point), which defines Ic and Vce before any AC signal is applied. Without proper biasing, an AC signal drives the transistor into cutoff or saturation on alternate half-cycles, clipping the waveform and introducing severe distortion. The goal of a good bias network is to keep the Q-point stable despite variation in temperature, transistor beta, and supply voltage tolerances across production batches.

Voltage divider bias: the industry standard

Voltage divider bias uses two resistors (R1 and R2) to form a voltage divider from Vcc to ground. The midpoint drives the base through a low-impedance Thevenin source, making the base voltage nearly independent of transistor beta. Combined with an emitter resistor Re, which provides DC negative feedback, the Q-point stays within a few percent even when beta varies 3:1 across parts. The Thevenin analysis replaces R1/R2 with a single Vth = Vcc * R2/(R1+R2) and Rth = R1||R2, then solves the simple KVL loop: Ib = (Vth - Vbe) / (Rth + (beta+1)*Re). This calculator performs that analysis exactly and reports the resulting Ic, Vce, gain, and input impedance.

Gain, input impedance, and the bypass capacitor trick

Small-signal voltage gain for a common-emitter stage is approximately Av = Rc' / (re' + Re), where re' = VT/Ic is the intrinsic emitter resistance (roughly 26/Ic mV/mA) and Rc' = Rc||RL is the effective AC collector load. The emitter resistor Re stabilizes the DC point but also reduces AC gain. Placing a large bypass capacitor in parallel with Re shorts it out at AC frequencies, recovering the full gain Rc'/re' while keeping the DC stability benefit. Input impedance Zin equals the bias resistor network in parallel with beta*(re'+Re); higher beta or larger Re raises Zin, improving loading on the previous stage.

Stability factor and thermal runaway

The stability factor S = dIc/dIco quantifies how much collector current changes for a given change in the leakage current Ico (which doubles roughly every 10 C in silicon). S = 1 is ideal (no change), while S = beta+1 is worst-case (fixed bias with no Re). Voltage divider bias with a well-chosen Re typically achieves S in the range 2-8, which is adequate for most designs up to 100 C. For power transistors or high-temperature environments, thermal resistance and transistor mounting become additional concerns beyond the scope of small-signal analysis.

BJT biasing topology comparison

TopologyCircuit complexityStabilityBest use
Voltage Divider BiasModerate (4 resistors)Best (S lowest)Amplifiers, production circuits
Emitter Feedback BiasLow (2 resistors + Re)GoodDiscrete designs needing simplicity
Collector Feedback BiasLow (1 feedback resistor)ModerateSimple amplifiers, self-biasing
Fixed Base BiasLowest (1 resistor)Poor (S = β+1)Switching circuits only

Relative characteristics of common NPN BJT biasing methods. S = stability factor (lower = better).

Frequently asked questions

What is the Q-point in transistor biasing?

The Q-point (quiescent point) is the DC operating point of the transistor: the values of Ic (collector current) and Vce (collector-emitter voltage) with no AC signal applied. A well-chosen Q-point sits near the center of the DC load line (Vce close to Vcc/2) to allow maximum undistorted AC swing in both directions.

Why is voltage divider bias more stable than fixed base bias?

In fixed base bias, the base current depends only on Rb, so Ic = beta * (Vcc-Vbe)/Rb shifts proportionally with beta. If beta doubles (common between transistors of the same type), Ic doubles. Voltage divider bias clamps the base voltage through a low Thevenin resistance and adds emitter resistance Re, so the base voltage is nearly constant regardless of beta, and Re provides negative DC feedback that limits Ic variation. The stability factor S = (beta+1)/(1+beta*Re/Rth) can be much lower than beta+1.

What does the stability factor S mean?

S quantifies how much collector current changes per unit change in the leakage current Ico. S = 1 means perfectly stable; S = beta+1 (worst case for fixed bias) means every microamp of Ico change causes a change of beta+1 microamps in Ic. For silicon transistors at room temperature Ico is small, but it doubles every 10 C, so a large S can lead to thermal runaway in power circuits.

How do I choose R1 and R2 for voltage divider bias?

A common rule of thumb is to make the current through the voltage divider (Vcc / (R1+R2)) about 10 times the base current Ib. This ensures the voltage divider is "stiff" so the base voltage stays near Vth regardless of Ib. Once you decide on the desired Q-point Ic and compute Vb = Vbe + Ic*Re/alpha, set Vth = Vb, then choose R1 and R2 so their ratio gives Vb = Vcc*R2/(R1+R2) and their parallel combination Rth = R1||R2 is much smaller than beta*Re.

Why is Vbe usually set to 0.7 V?

For a forward-biased silicon p-n junction, the exponential I-V curve is steep enough that the voltage across it stays near 0.6-0.7 V over a wide current range. 0.7 V is the standard engineering approximation; 0.65 V or 0.6 V are also used. Germanium BJTs use about 0.3 V. The actual value changes with temperature (roughly -2 mV per degree C), but for room-temperature DC analysis 0.7 V is accurate enough.

How does collector feedback bias work?

In collector feedback bias, the base resistor Rb connects from the collector to the base rather than from Vcc to the base. This provides automatic negative feedback: if Ic tries to increase, Vc drops, which reduces the voltage driving current through Rb, reducing Ib and limiting the rise in Ic. The self-correcting action gives better stability than fixed bias but worse than voltage divider bias, and it uses only one extra resistor.

What is the bypass capacitor for?

The emitter resistor Re improves DC stability but reduces AC voltage gain because some of the signal voltage is dropped across it. A bypass capacitor (typically electrolytic, large enough that its reactance is much less than Re at the lowest signal frequency) placed in parallel with Re short-circuits Re at AC while leaving the DC operating point unchanged. The result is DC stability from Re combined with maximum AC gain as if Re were not present.

Sources

Written by Dr. Tomás Okafor, PhD Physicist · Lagos, Nigeria

Physicist specializing in classical mechanics, bringing 17 years of research and applied dynamics expertise to every calculator he reviews.

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